PhD Student · UMass Amherst · Berkeley Lab
I’m a third-year Computer Science PhD student at the University of Massachusetts Amherst (UMass), co-advised by Prof. VP Nguyen and Prof. Deepak Ganesan. I’m also a research affiliate at Berkeley Lab, hosted by Dr. Yilun Xu, where I work on computer architecture and heterogeneous computing for real-time qubit readout under a sub-microsecond latency budget.
I work on computer architecture and hardware acceleration for performance-critical AI, focusing on real-time inference on spatial accelerators coupled with FPGAs, CPUs, and GPUs. My goal is to design and map models like transformers onto large AI Engine arrays with FPGA logic on AMD Versal, including custom architectures for attention, through hardware–software co-design of scheduling, operator fusion, offloading, data movement, and host overhead, so that end-to-end latency is analyzable and minimal under hard real-time constraints. I’m building a hardware-grounded latency oracle that finds the lowest-latency schedule under a latency and resource budget, and I’m validating it on AMD Versal and consumer XDNA2 NPUs, with SmolVLA, a vision-language-action model, as the target workload. I also apply this approach to hard-real-time quantum state classification, and I contribute kernels to AMD’s open-source MLIR-AIR compiler. Earlier work spans edge GPUs and FPGA DPUs.
A heterogeneous computing pipeline for real-time recurrent ML inference on a spatial AI accelerator. Independent computation is parallelized on an AI Engine array while the sequential state update (biggest bottnecks) runs in FPGA programmable logic, targeting a sub-microsecond latency budget. Outperforms prior hardware deployed SOTA in readout fidelity while using orders of magnitude less hardware resources (DSPs).
Building a hardware-grounded latency oracle that predicts latency for arbitrary matrix sizes and sequence lengths and searches for the lowest end-to-end schedule under a latency and resource budget. Validating on SmolVLA (a vision-language-action model) running entirely on the AMD XDNA2 NPU. Hardware-aware GEMM and FlashAttention kernels are merged upstream into AMD’s MLIR-AIR compiler. With hardware-aware tiling, vision-stage latency drops 53.0% and end-to-end latency 43.0% over AMD’s original flow, and 42.9% and 55.3%, respectively, over AMD’s Ryzen AI Software. End-to-end latency is also 13.5% lower than FastFlowLM on the same machine.
Representative papers on systems performance and efficient inference across applications. My current focus on heterogeneous acceleration for physical AI and quantum readout is under Active Research above. For a full list of publications, please visit my Scholar
2025
ACM MobiSys 2025 · A* conference
LiSWARM is a low-cost LiDAR system for accurate 3D tracking and recognition of drones in large swarms. Using point cloud processing, clustering, and neural networks, it achieves up to 98% accuracy and scales to 15,000 drones—enabling applications in airspace security, drone shows, and sensitive area monitoring.
2024
ACM SenSys 2024 · A* conference
MagicStream, a first-of-its-kind semantic-driven immersive telepresence system that effectively extracts and delivers compact semantic details of captured 3D representation of users, instead of traditional bit-by-bit communication of raw content.
2024
CVF/WACV 2024 · A conference
Using vision transformers for out-of-distribution data face identification, runs twice faster while achieving comparable performance with the state of the art DeepFace-EMD model.
Many patches are merged into AMD's spatial AI compiler mlir-air speeding up FlashAttention, LayerNorm, matmul, etc, boosting performance for SmolVLA and LLMs on the AMD XDNA2 NPU.
Presented research on real-time qubit readout to LBNL and AMD in Berkeley, CA.
Presented “Opportunities in Computer Systems Research for Quantum Computing” at ACM QSys 2025 (in conjunction with ACM MobiSys 2025).
One paper accepted at ACM MobiSys 2025.
I received the James Kurose Scholarship in Computer Science.
I officially become a research affiliate with Berkeley Lab.
My new academic website with the vule.us domain is live now.
One paper accepted at ACM SenSys 2024.
I joined University of Massachusetts Amherst, USA as a PhD student.
I received some CS PhD offers in the US.
One paper accepted at IEEE/CVF WACV.
I graduated with a bachelor's degree from Vietnam National University, Hanoi.
Outside of work, I'm an avid adventurer — I love road trips and have driven across the US to explore national parks and trails firsthand. Most of my hikes and adventures (Grand Canyon, Zion, Death Valley, Horseshoe Bend, Joshua Tree, the White Mountains in New Hampshire) were made possible by hitting the road. I also really enjoy lifting at the gym, jogging, brewing coffee, planting flowers, and skiing. I shoot with a Sony A6400 and a collection of Sigma and Sony lenses. Check out my photo gallery.